PROUDHADEVARAYA INSTITUTE OF TECHNOLOGY
T.B. Dam Hospet
ELECTRONICS AND COMMUNICATION ENGG DEPARTMENT.
SUB CODE:06ES82 SUB:EMBEDDED SYSTEM DESIGN
STAFF NAME: S.M.SHASHIDHAR CLASS: VIII SEM
SN
|
DATE
|
TOPIC TO BE
COVERED
|
Hours
|
|
|
1-2-12
|
Introduction :Overview
|
1 Hr
|
|
|
2-2-12
|
Optimizing the metrics
|
1 Hr
|
|
|
3-2-12
|
Processor Technology
|
1 Hr
|
|
|
6-2-12
|
Design Technology
|
1 Hr
|
|
|
7-2-12
|
Custom Single-Purpose
Processors: Optimizing Program
|
1 Hr
|
|
|
8-2-12
|
FSMD
|
1 Hr
|
|
|
9-2-12
|
Data path
|
1 Hr
|
|
|
10-2-12
|
FSM
|
1 Hr
|
|
|
13-2-12
|
General Purpose processors
and ASIP’s: Software and operation of general purpose processors
|
1 Hr
|
|
|
14-2-12
|
Programmer’s View
|
1 Hr
|
|
|
15-2-12
|
Development Environment
|
1 Hr
|
|
|
16-2-12
|
ASIP’S
|
1 Hr
|
|
|
17-2-12
|
Microcontrollers
|
1 Hr
|
|
|
23-2-12
|
DSP chips
|
1 Hr
|
|
|
24-2-12
|
Standard Peripherals:
Timers and Applications
|
1 Hr
|
|
|
27--2-12
|
PWM’s Application
|
1 Hr
|
|
|
28-2-12
|
UART-Keypad Controllers
|
1 Hr
|
|
|
29-2-12
|
Stepper Motor Controls
–A/D Converters
|
1 Hr
|
|
|
1-3-12
|
Memory: Different types of
ROM’s
|
1 Hr
|
|
|
2-3-12
|
Different types of RAM’s
|
1 Hr
|
|
|
5-3-12
|
Cache System Designs
|
1 Hr
|
|
|
6-3-12
|
Interfacing: Introduction
to Interfacing
|
1 Hr
|
|
|
7-3-12
|
Interrupts
|
1 Hr
|
|
|
8-3-12
|
DMA
|
1 Hr
|
|
|
9-3-12
|
Communication Serial
Protocols
|
1 Hr
|
|
|
12-3-12
|
Parallel Protocols
|
1 Hr
|
|
|
13-3-12
|
Wireless Protocols
|
1 Hr
|
|
|
14-3-12
|
Wireless Protocols
|
1 Hr
|
|
|
19-3-12
|
Interrupts: Basics
|
1 Hr
|
|
|
20-3-12
|
Shared Data Problem
|
1 Hr
|
|
|
21-3-12
|
Interrupt latency
|
1 Hr
|
|
|
22-3-12
|
Survey of software
Architecture: Round Robin
|
1 Hr
|
|
|
26-3-12
|
Round Robin with
Interrupts
|
1 Hr
|
|
|
27-3-12
|
Function Queues
-scheduling
|
1 Hr
|
|
|
28-3-12
|
RTOS architecture
|
1 Hr
|
|
|
29-3-12
|
Introduction to RTOS:
Tasks
|
1 Hr
|
|
|
30-3-12
|
States-data
|
1 Hr
|
|
|
2-4-12
|
Semaphores and shared data
|
1 Hr
|
|
|
3-4-12
|
Operating system services
|
1 Hr
|
|
|
9-4-12
|
Message Queues
|
1 Hr
|
|
|
10-4-12
|
Mail Boxes
|
1 Hr
|
|
|
11-4-12
|
Timers
|
1 Hr
|
|
|
12-4-12
|
Events- Memory Management
|
1 Hr
|
|
|
13-4-12
|
Interrupts
|
1 Hr
|
|
|
25-4-12
|
Basic Design Using RTOS:
Principles
|
1 Hr
|
|
|
26-4-12
|
An example encapsulating
semaphores
|
1 Hr
|
|
|
27-4-12
|
Queues
|
1 Hr
|
|
|
30-4-12
|
Hard Real Time scheduling
consideration
|
1 Hr
|
|
|
2-5-12
|
Hard real time scheduling consideration
|
1 Hr
|
|
|
3-5-12
|
Saving Memory space and
power
|
1 Hr
|
|
|
4-5-12
|
Saving Memory space and
power
|
1 Hr
|
|
|
7-5-12
|
Saving Memory space and
power
|
1 Hr
|
- May 2nd week onwards revision
- Theory Exams 28-5-2012 to 6-6-2012
- Practical Exams: 11/6/12 to 18/6/12
(SM Shashidhar) HOD
