Monday, February 6, 2012

Lesson Plan 4th sem B-section 10ECL48 HDL Firdosh Parveen S

PROUDHADEVARAYA INSTITUTE OF TECHNOLOGY
T.B Dam  Hospet
Dept of Electronics & Communication Engg.



Subject: HDL lab B-section                                          Staff incharge  : Firdosh Parveen S
Sub Code: 10ECL48

Sl No
Week
Topic
Remarks
  1.  
1
Write HDL Code to realize all  the logic gate

  1.  
2
Write a HDL Program for the following combinational designs

  1.  
3
Write a  HDL Code to describe the functions of a Full Adder using three modeling styles

  1.  
4
Write a model for 32 bit ALU using the schmatic diagram

  1.  
5
Develop the HDL code for the following flip flops, SR, D, JK,T

  1.  
6
Design 4 bit binary BCD counters (synchronous reset and Asynchronous reset ) and “any sequence” counters

  1.  
7
INTERFACING : Write HDL code to display messages on the given seven segment display and LCD and accepting Hex key pad input data

  1.  
8
To control speed direction of DC & Stepper motor

  1.  
9
To accept 8 Channel analog signal , Temp Sensors and display the data LCD panel or seven segment display

  1.  
10
To generate different wave forms (sine,Square,Triangle,Ramp,etc) using DAC change the frequence and amplitude

  1.  
11
To stimulate Elevator operations

  1.  
12
To control external Lights using relays